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Proven in production

Cutting-edge semiconductor teams use ChipAgents on real designs, from 3DIC to processor verification. Here's what changed for them.

Whalechip engineering
3DIC and wafer-on-wafer

Whalechip

Root-cause analysis on stacked-die designs, cut from days to minutes.

Hours per round of root-cause analysis
DaysBefore
15–60 minWith ChipAgents
The work
Whalechip deployed ChipAgents for root-cause analysis on its 3DIC and wafer-on-wafer designs, where stacked-die interactions make debug hard to isolate.
The result
Each round of root-cause analysis dropped from days to 15–60 minutes, with a 100% hit rate identifying the underlying issue.

“As a company with hands-on 3DIC and Wafer-on-Wafer mass production experience, ChipAgents enabled us to isolate design bugs significantly faster … a capability that will only grow more important as 3D stacked die interactions introduce ever-greater debugging complexity.”

Thomas Tsai
CEO, Whalechip
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eMemory engineering
NVM IP

eMemory

NeoFuse functional-model verification, from four days of effort to five hours.

Verification effort, per 100 units of work
~80%less effort
4 days → 5 hoursDatasheet analysis and testbench construction
+18%Verification test patterns
The work
ChipAgents automated critical portions of NeoFuse NVM IP functional-model verification: datasheet analysis, a generated verification plan, and a UVM testbench.
The result
Effort fell by about 80%, from an estimated four days to five hours, and verification test patterns increased by 18%.

“ChipAgents has gone beyond serving as an AI evaluator for eMemory’s behavioral model … It has also enabled our engineers to significantly enhance the quality and reliability of our IP datasheets.”

Max Yeh
CAD Director, eMemory
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Andes Technology engineering
RISC-V processor IP

Andes Technology

Bus interface unit verification, from two to three months down to about three weeks.

Bus interface unit verification, in weeks
2–3 monthsBefore
~3 weeksWith ChipAgents
04812
Hatched area shows the range of the original estimate.
The work
Andes uses ChipAgents across custom processor design and verification workflows, where customization and verification grow more resource-intensive with each architecture.
The result
Bus interface unit verification that took two to three months was completed in about three weeks, with less manual effort across multiple engineering workflows.

“As processor architectures continue to evolve, both customization and verification are becoming increasingly resource-intensive. ChipAgents helps our teams reduce manual effort across multiple engineering workflows … while maintaining the quality and correctness required for production processor designs.”

Yung-Ching Hsiao
Senior VP of R&D, Andes Technology
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Ambiq engineering
Ultra-low-power edge AI

Ambiq

An evaluation that turned into a wider rollout across engineering.

The work
Ambiq evaluated ChipAgents on its ultra-low-power edge AI semiconductor engineering.
The result
After the evaluation, Ambiq expanded deployment to additional engineering teams.

“Ambiq's leadership in Edge AI has always been driven by a relentless focus on innovation … As semiconductor designs become increasingly complex, we chose ChipAgents to help our engineering teams innovate faster while maintaining the quality our customers expect.”

Raghuram Tupuri
Executive Vice President of Engineering, Ambiq
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