ChipAgents Expands Collaboration with NVIDIA to Advance Agentic AI for Chip Design

Expanded collaboration uses NVIDIA AI software and accelerated computing to advance Renoir, ChipAgents’ domain-specialized model and agent system for autonomous semiconductor design

ChipAgents today announced it is expanding its collaboration with NVIDIA to advance Renoir, its domain-specialized model and agent system for chip design and verification.

Semiconductor design is entering a new phase of AI adoption. Most current AI deployments focus on specific design tasks: AI agents help with engineering documentation, bug analysis, or test plan generation, reducing the manual burden on design and verification teams.

A larger opportunity lies in closed-loop, autonomous engineering, systems capable of understanding design intent, reasoning across RTL and verification context, generating and evaluating design artifacts, invoking tools, learning from feedback, and completing complex chip development tasks end to end.

Achieving this level of autonomy requires more than applying a general-purpose language model to chip design. It requires an AI-native system built for the domain's technical complexity, specialized data and stringent security requirements. That is the problem ChipAgents' purpose-built Renoir language model was created to solve.

Solving the semiconductor model training conundrum

ChipAgents identified two fundamental constraints that general-purpose models and prompting alone cannot fully address: limited domain data and the need to protect valuable intellectual property.

The first is data scarcity. Software engineering benefits from decades of publicly available code, documentation, and technical discussion. Semiconductor design has no equivalent public corpus. Most valuable engineering knowledge in this industry resides within individual companies' proprietary design files and internal logs, data that never reaches the public internet. A model trained primarily on public sources will inevitably operate with an incomplete understanding of the domain.

The second is security. Design files, proprietary intellectual property, and internal debugging logs are, for many semiconductor companies, too sensitive to transmit to third-party cloud environments, regardless of model capability.

Renoir addresses both constraints by combining a domain-specialized model with a co-optimized agent harness designed for secure, production-grade semiconductor workflows.

The industry-first customizable, co-optimized agent harness and model for chip design

Renoir was fine-tuned from an open-weight, mixture-of-experts (MoE) large language model, using a carefully curated blend of public semiconductor data and proprietary data generated through ChipAgents' internal training stack. The model is optimized to work with ChipAgents' agentic system, which reasons across specifications, RTL, verification plans, assertions, logs, waveforms, and EDA tool outputs.

Rather than treating the model and agent framework as separate layers, ChipAgents trains and optimizes Renoir as part of a tightly integrated system. This approach is designed to improve model performance and deployment economics as semiconductor companies scale AI across engineering teams.

Renoir approaches frontier models' performance including Claude Fable 5 on our internal chip design benchmark suite but at as low as 22% of the cost. Compared to Claude Fable 5, Renoir is Pareto frontier of cost and performance.

Figure 1. Renoir's performance benchmark (scores are normalized to claude-fable-5 = 1)

NVIDIA infrastructure accelerates Renoir training and optimization

ChipAgents uses NVIDIA AI software and accelerated computing to optimize Renoir's model training, checkpoint management, and deployment optimization. These include:

• NVIDIA Megatron Core for scalable large-model training, including advanced model parallelism techniques for training large language models efficiently.
• NVIDIA NeMo Megatron Bridge open library to support scalable training workflows and bidirectional checkpoint conversion between Hugging Face and Megatron Core formats.
• NVIDIA Model Optimizer for model optimization techniques including quantization and quantization-aware training, helping improve inference efficiency while preserving model quality.

Together, these technologies help ChipAgents train, adapt, compress, and deploy Renoir as a production-ready agentic AI system for semiconductor engineering.

"Semiconductor design requires a different class of AI system," said Kexun Zhang, Head of Research at ChipAgents. "The model must understand hardware intent, reason across design and verification artifacts, operate within strict security boundaries, and deliver results at a cost structure that can scale across engineering teams. NVIDIA's software and compute infrastructure help us train, optimize, and deploy Renoir faster as we continue advancing autonomous chip design."

"AI agents are becoming a new class of digital workers, capable of helping engineers reason through complex systems and accelerate the pace of innovation," said Da Yang, senior director of product, semiconductor and EDA at NVIDIA. "ChipAgents is using NVIDIA AI and accelerated computing to train and optimize Renoir as a domain-specific AI system for chip design, helping engineers improve verification, protect IP and scale autonomous design workflows."

Moving toward autonomous chip design

Chip design is one of the most demanding environments for AI. Correctness matters. Context matters. IP protection matters. Cost matters. Renoir was built around those constraints from the beginning.

As adoption grows, ChipAgents will continue advancing Renoir's performance and efficiency curve with NVIDIA training and optimization technologies, moving the industry from AI-assisted tasks to closed-loop, autonomous engineering workflows.